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Date: Mon, 23 Jun 2008 17:45:22 -0700
From: Richard Barnette <Richard.Barnette@Sun.Com>
Subject: [2008/398]Hypervisor API for Transactional Memory Configuration
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Template Version: @(#)onepager.txt 1.35 07/11/07 SMI
Copyright 2007 Sun Microsystems

1. Introduction
    1.1. Project/Component Working Name:
	Hypervisor API for Transactional Memory Configuration

    1.2. Name of Document Author/Supplier:
	Richard.Barnette@sun.com

    1.3. Date of This Document:
	06/23/08

	1.3.1. Date this project was conceived:
		02/28/08

    1.4. Name of Major Document Customer(s)/Consumer(s):
	1.4.1. The PAC or CPT you expect to review your project:
		N/A
	1.4.2. The ARC(s) you expect to review your project:
		FWARC
	1.4.3. The Director/VP who is "Sponsoring" this project:
		Ravi.Subbarao@sun.com
	1.4.4. The name of your business unit:
		Systems

    1.5. Email Aliases:
     	1.5.1. Responsible Manager: Umesh.Sharma@sun.com
     	1.5.2. Responsible Engineer: Richard.Barnette@sun.com
     	1.5.3. Marketing Manager:
	1.5.4. Interest List: us-staff@sun.com

2. Project Summary
    2.1. Project Description:
	This project adds an API to the hypervisor to support
	processors that provide hardware Transactional Memory.

    2.2. Risks and Assumptions:
	This project requires a processor that implements
	Transactional Memory, and the processor is expected to
	provide the ability to enable or disable the feature.

3. Business Summary
	Future UltraSPARC based systems will support Transactional
	Memory (TM) capabilities.  TM is a revolutionary new
	processor capability that can simultaneously simplify the
	programming of multi-threaded application programs and
	provide dramatic performance improvements.

    3.1. Problem Area:
	TM provides a greatly simplified programming model, but it
	brings with it a new challenge: that of testing and debugging
	transaction failure handlers.  The new API provides the ability
	to perform such testing, without requiring applications to be
	recompiled for the testing.

    3.2. Market/Requester:
         The primary consumers of the API will be internal
	developers developing transactional memory based library
	functions, and similar application level code that uses TM.
	Third party developers learning to use TM may also benefit
	from the capability.

    3.3. Business Justification:

    3.4. Competitive Analysis:

    3.5. Opportunity Window/Exposure:

    3.6. How will you know when you are done?:
	The project is done when the API is implemented as specified
	on hardware that supports the underlying capability.

4. Technical Description:
     4.1. Details:
	The project adds a single Hypervisor API function that will
	allow a guest operating system to enable or disable TM
	capabilities on the calling virtual CPU.  When disabled,
	TM specific instructions will be treated as legal, but
	transactions started by the affected CPU will always fail.

	Disabling TM allows software that contains transactions to
	test the transaction failure code paths.  Because these
	failure code paths are meant to be rarely executed by
	design, they cannot always be easily tested.  Providing a
	disable allows for more thorough testing.

     4.2. Bug/RFE Number(s):

     4.3. In Scope:

     4.4. Out of Scope:

     4.5. Interfaces:
     4.5.1. Imported Interfaces:
	N/A

     4.5.2. Exported Interfaces:
     Interface                   Classification  Comments
      
====================================================================
     TM_GROUP			Committed	API group
     TM_ENABLE			Committed	API call

     4.6. Doc Impact:
	N/A

     4.7. Admin/Config Impact:
	N/A

     4.8. HA Impact:
	N/A

     4.9. I18N/L10N Impact:
	N/A

     4.10. Packaging & Delivery:
	N/A

     4.11. Security Impact:
	N/A

     4.12. Dependencies:
	N/A

5. Reference Documents:
	N/A

6. Resources and Schedule:
    6.1. Projected Availability:

    6.2. Cost of Effort:


    6.3. Cost of Capital Resources:

    6.4. Product Approval Committee requested information:
    	6.4.1. Consolidation or Component Name:
	6.4.3. Type of CPT Review and Approval expected:
         6.4.4. Project Boundary Conditions:
	6.4.5. Is this a necessary project for OEM agreements:
		No
	6.4.6. Notes:
	6.4.7. Target RTI Date/Release:
	6.4.8. Target Code Design Review Date:
	6.4.9. Update approval addition:

    6.5. ARC review type:
		Standard
    6.6. ARC Exposure:
		open
        6.6.1. Rationale:

7. Prototype Availability:
    7.1. Prototype Availability:

    7.2. Prototype Cost:

--
Richard Barnette            | Gather ye rosebuds while ye may,
Sun Microsystems            | Old Time is still a-flying:
Enterprise Systems Software | And this same flower that smiles to-day
SCA11 2384 / USCA11-205     | To-morrow will be dying.
(408) 276-7541 / x17541     |   -- Robert Herrick
.                           |      "To the Virgins, to Make Much of  
Time"


