From sacadmin Wed Apr  1 15:00:48 2009
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Date: Wed, 01 Apr 2009 15:00:23 -0700
From: Hitendra Zhangada <Hitendra.Zhangada@sun.com>
Subject: Fast-track : 2009/213 - dma-sync-options property under PCI Express
 Root Complex nodes
Sender: Hitendra.Zhangada@sun.com
To: Firmware Arch <fwarc@sun.com>
Cc: "Lee, Pingchun" <Pingchun.Lee@sun.com>,
        Alan Adamson <Alan.Adamson@sun.com>
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I am sponsoring this fast-track case for Ping Lee.  This case adds
"dma-sync-options" property to PCIE bindings.  See details at,

http://sac.eng/FWARC/2009/213/Materials/dma-sync-options-property.txt

Interface table is part of above document as well.


Updated PCIE Bindings is also copied to the case directory, available at,

http://sac.eng/FWARC/2009/213/Materials/pcie_bindings112.txt


The timer is set to time-out on April 8, 2009.

This case will be approved for a minor/micro/patch OS binding
and a minor/micro binding for the firmware.


I would like to see at least one LGTM for this case.


Thanks.


-- 
Hitendra Zhangada
====================================
SPS Common SW Features Engineering
Systems Group, Sun Microsystems, Inc.
Sun Ph# (858) 625 3757, Sun Ext. x53757
Internal homepage http://esp.west/~hitu


From sacadmin Wed Apr  1 21:53:55 2009
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Date: Wed, 01 Apr 2009 21:53:52 -0700
From: Greg Onufer <greg.onufer@sun.com>
Subject: Re: Fast-track : 2009/213 - dma-sync-options property under PCI
 Express Root Complex nodes
In-reply-to: <49D3E3F7.5030604@Sun.COM>
To: Hitendra Zhangada <Hitendra.Zhangada@sun.com>
Cc: Firmware Arch <fwarc@sun.com>, "Lee, Pingchun" <Pingchun.Lee@sun.com>,
        Alan Adamson <Alan.Adamson@sun.com>
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On Apr 1, 2009, at 3:00 PM, Hitendra Zhangada wrote:
> http://sac.eng/FWARC/2009/213/Materials/dma-sync-options-property.txt

This case is not backwards compatible with existing sun4v requirements.

"while the absence of the property indicates all synchronization can  
be treated as a no-op (as on Fire and N2/VF PIU platforms)."
It's a *new* property, it did not exist before.  Existing code is  
required to invoke the dma-sync hcalls in order to be sun4v- 
compliant.  To remain backwards compatible it needs to be specified  
that if the property does not exist then a guest may not assume any  
optimizations and must always invoke the dma-sync hcalls.  If it  
exists with a value of 0x0 then no synchronization is necessary.
In addition, to be pedantic: this property is describing  
characteristics of both the PCIe host bridge and characteristics of  
other devices on the "system bus"... whether or not the host bridge  
requires its own synchronization is independent of whether or not  
another device on the system bus needs synchronization (eg, a  
processor's caches) before the host bridge may begin or finish a DMA  
transaction.  So this property describes both the host bridge device  
and the sum of all other "system bus" devices even though it exists in  
the host bridge device node.  I'll assume that's okay but wanted to  
point it out.
Cheers!greg


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From sacadmin Thu Apr  2 01:34:30 2009
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Date: Thu, 02 Apr 2009 01:34:22 -0700
From: David Kahn <David.Kahn@sun.com>
Subject: Re: Fast-track : 2009/213 - dma-sync-options property under PCI
 Express Root Complex nodes
To: Hitendra Zhangada <Hitendra.Zhangada@sun.com>
Cc: Firmware Arch <fwarc@sun.com>, "Lee, Pingchun" <Pingchun.Lee@sun.com>,
        Alan Adamson <Alan.Adamson@sun.com>
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is it true that the px driver just decided not to
call the HV IO APIs for dma sync, thus making it
non-compliant with the sun4v io api?

>         If the nexus driver knows a sync is not necessary it can
>         treat the ddi_dma_sync() call as a no-op.  This is the case for
>         current generation of PCI Express platforms (Fire and N2/VF PIU). The
>         px nexus driver sets the DMA memory object's flags with DMP_NOSYNC
>         which results in all calls to ddi_dma_sync to immediately return
>         back to the caller.


I'm not sure this is the right fix for that problem. The APIs
should be lightweight on platforms that don't need to do anything.

I want more information on this. Hitendra, I'm going to derail
this for further discussion. I don't want this case to time out
with approval until the proper discussion has happened.

-David

From sacadmin Thu Apr  2 01:44:14 2009
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Date: Thu, 02 Apr 2009 01:44:07 -0700
From: David Kahn <David.Kahn@sun.com>
Subject: Re: Fast-track : 2009/213 - dma-sync-options property under PCI
 Express Root Complex nodes
To: Hitendra Zhangada <Hitendra.Zhangada@sun.com>
Cc: Firmware Arch <fwarc@sun.com>, "Lee, Pingchun" <Pingchun.Lee@sun.com>,
        Alan Adamson <Alan.Adamson@sun.com>
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another (minor)problem with the materials for me, is that
there's an assumption about what dma read and dma
write means. At least that needs to be clarified.

I'm assuming that dma read means that the host
is reading data from the device. In other words, the
device is issuing mem write transactions and modifying
system memory. The host is doing a dma read. The device
is doing a dma write.

Otherwise it doesn't make sense, unless I'm missing something.

But the way it's written, it's subject to interpretation.

At least this is relatively easy to fix. Define the terms
so it's not subject to the readers interpretation.

-David

From sacadmin Thu Apr  2 01:54:59 2009
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Date: Thu, 02 Apr 2009 01:54:48 -0700
From: David Kahn <David.Kahn@sun.com>
Subject: Re: Fast-track : 2009/213 - dma-sync-options property under PCI
 Express Root Complex nodes
To: Hitendra Zhangada <Hitendra.Zhangada@sun.com>
Cc: Firmware Arch <fwarc@sun.com>, "Lee, Pingchun" <Pingchun.Lee@sun.com>,
        Alan Adamson <Alan.Adamson@sun.com>
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Also, are the pci-e bindings the right place for this?
I don't think so, because this has nothing to do with the
pcie standard, and the bindings implement the pcie standard
on any system with pcie, including x64, etc. But, if the
team wants to do that, shouldn't they be required to update
the binding, like other cases have done?

Also, is there yet another case for the companion md
property?

ok, derail for now. Too many open issues for me. Including
the one that Greg raised.

-David




From sacadmin Thu Apr  2 11:56:50 2009
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Date: Thu, 02 Apr 2009 11:56:27 -0700
From: Hitendra Zhangada <Hitendra.Zhangada@sun.com>
Subject: Re: Fast-track : 2009/213 - dma-sync-options property under PCI
 Express Root Complex nodes
In-reply-to: <49D47D58.7060003@sun.com>
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David Kahn wrote:
>
> Also, are the pci-e bindings the right place for this?

That could be my fault.  I asked them to update the PCIE bindings.
I assumed that this sort of change can be added to the bindings
document.  We can take it out of the bindings and let it stand by
itself or part of some other bindings/descriptions.

> I don't think so, because this has nothing to do with the
> pcie standard, and the bindings implement the pcie standard
> on any system with pcie, including x64, etc. But, if the
> team wants to do that, shouldn't they be required to update
> the binding, like other cases have done?

Not sure what you you mean by updating the bindings.  Ping
did provided updated bindings document with a section added
to describe the new property.

>
> Also, is there yet another case for the companion md
> property?

Yes, that is going to be in part of another case describing MD
properties.

>
> ok, derail for now. Too many open issues for me. Including
> the one that Greg raised.

Ok, I will suspend the timer and will work with Ping and Alan to
provide more information and answers to questions raised.
I will move case to "waiting need spec" for now.


Thanks.

>
> -David
>
>
>


-- 
Hitendra Zhangada
=============================================
SPS Common SW Features Engineering
Systems Group, Sun Microsystems, Inc.
Work Ph# (858) 625 3757, Ext. x53757
SUN Internal homepage http://esp.west/~hitu


From sacadmin Thu Apr  2 13:11:27 2009
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Date: Thu, 02 Apr 2009 13:11:25 -0700
From: Tayfun Kocaoglu <tayfun.kocaoglu@sun.com>
Subject: Re: Fast-track : 2009/213 - dma-sync-options property under PCI
 Express Root Complex nodes
In-reply-to: <49D47AD7.6060908@sun.com>
To: David Kahn <David.Kahn@sun.com>
Cc: Hitendra Zhangada <Hitendra.Zhangada@sun.com>,
        Firmware Arch <fwarc@sun.com>, "Lee, Pingchun" <Pingchun.Lee@sun.com>,
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David Kahn wrote:
> another (minor)problem with the materials for me, is that
> there's an assumption about what dma read and dma
> write means. At least that needs to be clarified.
>
> I'm assuming that dma read means that the host
> is reading data from the device. In other words, the
> device is issuing mem write transactions and modifying
> system memory. The host is doing a dma read. The device
> is doing a dma write.
>
Don't you have it backwards? DMA read means system memory is the source 
DMA write means system memory is the target isn't it ?
> Otherwise it doesn't make sense, unless I'm missing something.
>
> But the way it's written, it's subject to interpretation.
>
> At least this is relatively easy to fix. Define the terms
> so it's not subject to the readers interpretation.
>
> -David
-tek


From sacadmin Thu Apr  2 13:32:22 2009
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Date: Thu, 02 Apr 2009 13:32:19 -0700
From: David Kahn <David.Kahn@sun.com>
Subject: Re: Fast-track : 2009/213 - dma-sync-options property under PCI
 Express Root Complex nodes
In-reply-to: <49D51BED.6080002@sun.com>
To: Tayfun Kocaoglu <tayfun.kocaoglu@sun.com>
Cc: Hitendra Zhangada <Hitendra.Zhangada@sun.com>,
        Firmware Arch <fwarc@sun.com>, "Lee, Pingchun" <Pingchun.Lee@sun.com>,
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Tayfun Kocaoglu wrote:

> Don't you have it backwards?

No, not me :) I read it the same you did at first ...

> DMA read means system memory is the source 
> DMA write means system memory is the target isn't it ?

>                 DMASYNC_POSTREAD (0x00000008) Synchronization after there's a
>                 DMA transfer from the device to host memory is required.

I guess they are defining it in the case materials, but it's
the opposite of what you and I think dma read and write means.

We are using the definition from the point of view of the device,
which is the entity that issues the memory transactions.

A device read turns into a memory (dma) write, and a device write
turns into a memory (dma) read, from the device perspective.

They might want to call the directions "to device" and "from device"
or something like that, so the name problem goes away. Even with
the terms defined there, the names themselves are confusing.

-David

From sacadmin Thu Apr  2 14:07:07 2009
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Date: Thu, 02 Apr 2009 14:07:04 -0700
From: Tayfun Kocaoglu <tayfun.kocaoglu@sun.com>
Subject: Re: Fast-track : 2009/213 - dma-sync-options property under PCI
 Express Root Complex nodes
In-reply-to: <49D520D3.4090507@sun.com>
To: David Kahn <David.Kahn@sun.com>
Cc: Hitendra Zhangada <Hitendra.Zhangada@sun.com>,
        Firmware Arch <fwarc@sun.com>, "Lee, Pingchun" <Pingchun.Lee@sun.com>,
        Alan Adamson <Alan.Adamson@sun.com>
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David Kahn wrote:
>
>
> Tayfun Kocaoglu wrote:
>
>> Don't you have it backwards?
>
> No, not me :) I read it the same you did at first ...
>
>> DMA read means system memory is the source DMA write means system 
>> memory is the target isn't it ?
>
>>                 DMASYNC_POSTREAD (0x00000008) Synchronization after 
>> there's a
>>                 DMA transfer from the device to host memory is required.
>
> I guess they are defining it in the case materials, but it's
> the opposite of what you and I think dma read and write means.
>
> We are using the definition from the point of view of the device,
> which is the entity that issues the memory transactions.
>
> A device read turns into a memory (dma) write, and a device write
> turns into a memory (dma) read, from the device perspective.
>
> They might want to call the directions "to device" and "from device"
> or something like that, so the name problem goes away. Even with
> the terms defined there, the names themselves are confusing.
>
There can  only be one way of talking about DMA reads and writes 
otherwise, it is guaranteed to be confusing and wrong.

DMA  <"What is happening to the main memory?">

DMA read (Someone is reading from memory).
DMA write (Someone is writing to memory).

DMA read is "to device" DMA write is "from device".

Having 4 bits (incorrectly defined no less) does not make any sense to 
me.  There are only two cases to worry about.

1. CPU owns the memory and wants to give it to a device so that it can 
do it's DMA. Do we have to do something before that ?

2. Device just done accesing the memory and cpu wants/needs to access 
that memory now. Do we have to do something before that?


hcall_dma_sync()  defines flushes in terms of "ownership" of the memory 
being transfered to an entity "device" or "cpu".

Before a device can do a DMA (read or write), the ownership of the 
memory in question needs to be transferred to the device by a call to 
hcall_dma_sync()  with the appropriate flag.

After the DMA by the device is done, and before the cpu can access the 
data, ownership of the memory in question needs to be transferred to the 
cpu by a call to hcall_dma_sync() with the appropriate flag.

One or both of these can be skipped on a particular system, we should be 
specifying  which one(s) must be done.

if ((<sync direction>  AND dma-sync-options) != 0)  
hcall_dma_sync((<sync direction>  AND dma-sync-options))

If the property does not exist, the default value of it must be to sync 
for both directions.

-tek


From sacadmin Thu Apr  2 14:21:22 2009
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Date: Thu, 02 Apr 2009 14:21:19 -0700
From: David Kahn <David.Kahn@Sun.COM>
Subject: Re: Fast-track : 2009/213 - dma-sync-options property under PCI
 Express Root Complex nodes
To: Hitendra Zhangada <Hitendra.Zhangada@Sun.COM>
Cc: Firmware Arch <fwarc@Sun.COM>, "Lee, Pingchun" <Pingchun.Lee@Sun.COM>,
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Hitendra Zhangada wrote:
>
> Not sure what you you mean by updating the bindings.  Ping
> did provided updated bindings document with a section added
> to describe the new property.

yeah, I see that now in the Materials directory.


Well, I was thinking about where it belongs, if we actually
do the property thing. It should probably go in the thing
we used to call the "vpci" bindings. That's the binding that
defines the sun4v virtual pci root complex. It's effectively
a device binding for that.

I'm not sure where that stuff ended up. It's somewhere,
because we did define the compatible propval for it, etc.

-David

From sacadmin Thu Apr  2 14:34:51 2009
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Date: Thu, 02 Apr 2009 14:34:48 -0700
From: Hitendra Zhangada <Hitendra.Zhangada@Sun.COM>
Subject: Re: Fast-track : 2009/213 - dma-sync-options property under PCI
 Express Root Complex nodes
In-reply-to: <49D52C4F.2000805@sun.com>
Sender: Hitendra.Zhangada@Sun.COM
To: Firmware Arch <fwarc@Sun.COM>
Cc: "Lee, Pingchun" <Pingchun.Lee@Sun.COM>,
        Alan Adamson <Alan.Adamson@Sun.COM>, Wesley Shao <Wesley.Shao@Sun.COM>
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David Kahn wrote:
>
>
> Hitendra Zhangada wrote:
>>
>> Not sure what you you mean by updating the bindings.  Ping
>> did provided updated bindings document with a section added
>> to describe the new property.
>
> yeah, I see that now in the Materials directory.
>
>
> Well, I was thinking about where it belongs, if we actually
> do the property thing. It should probably go in the thing
> we used to call the "vpci" bindings. That's the binding that
> defines the sun4v virtual pci root complex. It's effectively
> a device binding for that.
>
> I'm not sure where that stuff ended up. It's somewhere,
> because we did define the compatible propval for it, etc.

Thanks.  A proper place to add this property is being discussed.
It will end up in one or more bindings (not in PCI-E bindings).
Stay tuned.


>
> -David


-- 
Hitendra Zhangada
=============================================
SPS Common SW Features Engineering
Systems Group, Sun Microsystems, Inc.
Work Ph# (858) 625 3757, Ext. x53757
SUN Internal homepage http://esp.west/~hitu


From sacadmin Fri Apr 17 14:05:13 2009
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Date: Fri, 17 Apr 2009 14:04:46 -0700
From: Sunit Jain <S.Jain@Sun.COM>
Subject: Re: Fast-track : 2009/213 - dma-sync-options property under PCI
 Express Root Complex nodes
In-reply-to: <49DFD982.5020108@sun.com>
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Case timer expired yesterday, this case is now closed approved.
IAM* file has been updated.

IO Device node specification & Sun4v Bindings updated by this case
have been copied under FWARC/Specifications section.

Regards,
Sunit



David Kahn wrote:
>
>
> Hitendra Zhangada wrote:
>
>> Done.  See updated specification,
>>
>> http://sac.eng/Archives/CaseLog/arc/FWARC/2009/213/Materials/dma-sync-options-property.txt 
>
>
> LGTM.
>
> Thanks,
> -David

--Boundary_(ID_BYKUn8d9Bj/R81zGWOlO+A)
Content-type: text/html; charset=ISO-8859-1
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<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
<html>
<head>
  <meta content="text/html;charset=ISO-8859-1" http-equiv="Content-Type">
</head>
<body bgcolor="#ffffff" text="#000000">
<font size="-1"><font face="Arial">Case timer expired yesterday, this
case is now closed approved.<br>
IAM* file has been updated.<br>
<br>
IO Device node specification &amp; Sun4v Bindings updated by this case<br>
have been copied under FWARC/Specifications section.<br>
<br>
Regards,<br>
Sunit<br>
<br>
<br>
</font></font><br>
David Kahn wrote:
<blockquote cite="mid:49DFD982.5020108@sun.com" type="cite"><br>
  <br>
Hitendra Zhangada wrote:
  <br>
  <br>
  <blockquote type="cite">Done.&nbsp; See updated specification,
    <br>
    <br>
<a class="moz-txt-link-freetext" href="http://sac.eng/Archives/CaseLog/arc/FWARC/2009/213/Materials/dma-sync-options-property.txt">http://sac.eng/Archives/CaseLog/arc/FWARC/2009/213/Materials/dma-sync-options-property.txt</a>
  </blockquote>
  <br>
LGTM.
  <br>
  <br>
Thanks,
  <br>
-David
  <br>
</blockquote>
</body>
</html>

--Boundary_(ID_BYKUn8d9Bj/R81zGWOlO+A)--

